1. Field of the Invention
The invention relates in general to a thin film transistor and manufacturing method thereof, and more particularly to a thin film transistor with conductive bumps thereon and the manufacturing method thereof.
2. Description of the Related Art
In most of the electrical devices, components can electrically connect to the main circuits by an anisotropic conductive film (ACF), for example, a driver integrated circuit is electrically connected with the display panel by an ACF. The ACF is composed of non-conductive resin and conductive particles, and the centers of the conductive particles are polymers whose surfaces are coated by a metal conductive layer, such as gold, nickel, or tin. In addition to the ACF is applied during the manufacturing processes of flat panels, chip on glass (COG) and chip on film (COF) are also applied in bonding a driver integrated circuit onto the liquid crystal display. As for COG, a driver integrated circuit (driver IC) is bonded onto the glass substrate of the display panel directly, and as for COF, the driver IC is bonded onto a carrier, such as TAB, and then the driver IC can be connected with the glass substrate by the carrier.
FIG. 1A is a cross-section view of a conventional semiconductor structure produced by COG. Referring to FIG. 1, a conventional semiconductor structure 10 includes a glass substrate 11, a chip 12, and an ACF 16. Several metal electrode pads 13 are on the surface of the substrate 11a, and several aluminum electrode pads 14 are on the surface of the chip 12a. Each one glad bump 15 is on each of the aluminum electrode pads 14. The ACF 16 is connected with part of the surface of the substrate 11a, and part of the surface of the chip 12a. The ACF 16 includes several conductive particles 17, and parts of the conductive particles 17 are for electrically connecting with the metal electrode pads 13 and the gold bumps 15.
When the pitch between two adjoining aluminum electrode pads 14 is decreasing to meet the requirement of small sizes, the pitch between two gold bumps 15 is decreasing as well. However, it is easy to cause electrical short between two adjoining gold bumps 15 when the conductive particles 17 gather together between two adjoining gold bumps 15, as shown in FIG. 1A. As a result, the electrical quality of the semiconductor structure 10 is great affected.
Referring to FIG. 1B, is a cross-section view of a composite bump formed on a chip or substrate disclosed in U.S. Pat. No. 5,393,697. In FIG. 1B, an aluminum pad 26 is formed on the surface 30a of the chip 30. A passivation layer 28 is formed on part of the surface of the chip 30a and on the surroundings of the aluminum pad 26, the central of the aluminum pad 26 is exposed. A composite bump 31 is on the chip 30, and includes a polymer body 32 and a conductive metal layer 36. The polymer body 32 is formed on the central of the aluminum pad 26. A space is between the polymer body 32 and the passivation layer 28, for exposing part of the aluminum pad 26. The conductive metal layer 36 covers the polymer body 32, part of the aluminum pad 26, and part of the passivation layer 28, for electrically connecting with to the aluminum pad 26.
When the chip 30 with several composite bumps 31 is electrically connected with several electrode pads of a glass substrate by an ACF, the conductive particles of the ACF still gather together between two adjoining composite bumps 31 easily, which causes electrical connecting and electrical short between two adjoining composite bumps 31. Moreover, the heights of the composite bumps 31 on the chip 30 are difficult to be controlled well. The composite bumps 31 on the chip 30 are uneven, so that the surface of the chip 30 cannot be electrically connected with the substrate evenly, and the electrical quality of the chip 30 and the substrate thereon are great affected.